View LTM4627-15_8239091.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1 typical application description 15a dc/dc module regulator the lt m ? 4627 is a complete 15a output high effciency switch mode dc/dc power supply. included in the pack - age are the switching controller, power fets, inductor and compensation components. operating over an input voltage range from 4.5v to 20v , the l tm4627 supports an output voltage range of 0.6v to 5v, set by a single external resistor. only a few input and output capacitors are needed. current mode operation allows precision current sharing of up to four ltm4627 regulators to obtain 60a output. high switching frequency and a current mode architecture enable a very fast transient response to line and load changes without sacrifcing stability. the device supports frequency synchronization, multiphase/current sharing operation, burst mode operation and output voltage track - ing for supply rail sequencing. the ltm4627 is offered in thermally enhanced 15mm 15mm 4.32mm lga and 15mm 15mm 4.92mm bga packages. the ltm4627 is available with snpb (bga) or rohs compliant terminal fnish. l , lt, ltc, ltm, linear technology, the linear logo, burst mode, module and polyphase are registered trademarks and ltpowercad is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents, including 5481178, 5847554, 6580258, 6304066, 6476589, 6774611, 6677210. 1.2v, 15a dc/dc module ? regulator features applications n complete 15a switch mode power supply n wide input voltage range: 4.5v to 20v n 0.6v to 5v output range n 1.5% total dc output error n differential remote sense amplifer for precision regulation n current mode control/ fast transient response n frequency synchronization n parallel current sharing (up to 60a) n selectable pulse-skipping or burst mode ? operation n soft-start/voltage t racking n up to 93% effciency (12v in , 3.3v out ) n overcurrent foldback protection n output overvoltage protection n small surface mount footprint, low profle 15mm 15mm 4.32mm lga and 15mm 15mm 4.92mm bga packages n telecom servers and networking equipment n atca and storage cards n industrial equipment n medical systems effciency vs load current comp track/ss run f set mode_pllin pgood v out v out_lcl diff_out v osns + v osns ? v fb ltm4627 v in 10k r fb ** 60.4k 100k 22f 16v 3 82pf 0.1f 470f 6.3v 100f* 6.3v v out 1.2v 15a intv cc extv cc * see table 4 ** see table 1 4627 ta01a v in 4.5v to 16v sgnd gnd 150pf + load current (a) 0 50 efficiency (%) 55 65 70 75 85 4 8 10 4627 ta01b 60 90 95 80 2 6 12 14 16 12v in , 1.2v out 5v in , 1.2v out ltm4627 4627fc for more information www.linear.com/ltm4627
2 absolute maximum ratings v in ............................................................. C0 .3v to 22v intv cc , v out (v out 3.3v with diff amp), v out_lcl , pgood, extv cc ....... C0.3v to 6v m ode_pllin, f set , track/ss, v osns C , v osns + , diff_out ................... C0 .3v to intv cc comp, v fb ................................................. C0.3v to 2.7v run (note 5) ............................................... C0 .3v to 5v (note 1) intv cc peak output current (note 6) .................. 100 ma internal operating temperature range (note 2) .............. e an d i-grades ................................... C4 0c to 125c mp-grade .......................................... C 55c to 125c storage temperature range .................. C 55c to 125c refow (peak body) temperature .......................... 250 c bga package 133-lead (15mm 15mm 4.92mm) 1 2 3 4 5 6 7 8 109 11 12 b c d e f g h j k l a m top view v out v in gnd v out v in intv cc f set comp track/ss mode_pllin intv cc sgnd extv cc v fb pgood pgood run v osns + diff_out v out_lcl v osns ? t j(max) = 125c, v ja = 17.9c/w, v jcbottom = 5.9c/w, v jctop = 15c/w, v jb = 6.1c/w, v values determined per jesd 51-12 using a jesd 51-9 defined pcb weight = 2.8g lga package 133-lead (15mm 15mm 4.32mm) v in 1 2 3 4 5 6 7 8 109 11 12 b c d e f g h j k l a m intv cc f set comp track/ss mode_pllin intv cc top view sgnd v out v in gnd v out extv cc v fb pgood pgood run v osns + diff_out v out_lcl v osns ? t j(max) = 125c, v ja = 16.6c/w, v jcbottom = 4.6c/w, v jctop = 15c/w, v jb = 5.1c/w, v values determined per jesd 51-12 using a jesd 51-9 defined pcb weight = 2.6g pin configuration order information part number pad or ball finish part marking* package type msl rating temperature range (note 2) device finish code ltm4627ev#pbf au (rohs) ltm4627v e4 lga 3 C40c to 125c ltm4627iv#pbf au (rohs) ltm4627v e4 lga 3 C40c to 125c ltm4627ey#pbf sac305 (rohs) ltm4627y e1 bga 3 C40c to 125c ltm4627iy#pbf sac305 (rohs) ltm4627y e1 bga 3 C40c to 125c ltm4627iy snpb (63/37) ltm4627y e0 bga 3 C40c to 125c ltm4627mpy#pbf sac305 (rohs) ltm4627y e1 bga 3 C55c to 125c ltm4627mpy snpb (63/37) ltm4627y e0 bga 3 C55c to 125c consult marketing for parts specifed with wider operating temperature ranges. *device temperature grade is indicated by a label on the shipping container. pad or ball fnish code is per ipc/jedec j-std-609. ? terminal finish part marking: www.linear.com/leadfree ? recommended lga and bga pcb assembly and manufacturing procedures: www.linear.com/umodule/pcbassembly ? lga and bga package and t ray drawings: www .linear.com/packaging ltm4627 4627fc for more information www.linear.com/ltm4627
3 electrical characteristics the l denotes the specifcations which apply over the specifed internal operating temperature range, otherwise specifcations are at t a = 25c (note 2), v in = 12v, per the typical application in figure 18. symbol parameter conditions min typ max units v in input dc voltage l 4.5 20 v v out(dc) output voltage, total variation with line and load c in = 22f 3 c out = 100f ceramic, 470f poscap r fb = 40.2k, mode_pllin = gnd v in = 5v to 20v, i out = 0a to 15a (note 4) l 1.477 1.50 1.523 v input specifcations v run run pin on threshold v run rising 1.1 1.25 1.4 v v runhys run pin on hysteresis 130 mv i q(vin) input supply bias current v in = 12v, v out = 1.5v, burst mode operation, i out = 0.1a v in = 12v, v out = 1.5v, pulse-skipping mode, i out = 0.1a v in = 12v, v out = 1.5v, switching continuous, i out = 0.1a shutdown, run = 0, v in = 12v 17 25 54 40 ma ma ma a i s(vin) input supply current v in = 5v, v out = 1.5v, i out = 15a v in = 12v, v out = 1.5v, i out = 15a 5.05 2.13 a a output specifcations i out(dc) output continuous current range v in = 12v, v out = 1.5v (note 4) 0 15 a ?v out (line) v out line regulation accuracy v out = 1.5v, v in from 4.5v to 20v i out = 0a l 0.02 0.06 %/v ?v out (load) v out load regulation accuracy v out = 1.5v, i out = 0a to 15a, v in = 12v (note 4) l 0.2 0.45 % v out(ac) output ripple voltage i out = 0a, c out = 100f ceramic, 470f poscap v in = 12v, v out = 1.5v 15 mv p-p ? v out(start) turn-on overshoot c out = 100f ceramic, 470f poscap, v out = 1.5v, i out = 0a, v in = 12v 20 mv t start turn-on time c out = 100f ceramic, 470f poscap, no load, track/ss = 0.001f, v in = 12v 0.6 ms ? v outls peak deviation for dynamic load load: 0% to 50% to 0% of full load c out = 100f ceramic, 470f poscap, v in = 12v, v out = 1.5v 60 mv t settle settling time for dynamic load step load: 0% to 50% to 0% of full load v in = 5v, c out = 100f ceramic, 470f poscap 20 s i outpk output current limit v in = 12v, v out = 1.5v v in = 5v, v out = 1.5v 25 25 a a control section v fb voltage at v fb pin i out = 0a, v out = 1.5v l 0.594 0.60 0.606 v i fb current at v fb pin (note 7) C12 C25 na v ovl feedback overvoltage lockout l 0.65 0.67 0.69 v i track/ss track pin soft-start pull-up current track/ss = 0v 1.0 1.2 1.4 a t on(min) minimum on-time (note 3) 90 ns r fbhi resistor between v out_lcl and v fb pins 60.05 60.40 60.75 k v osns + , v osns C cm range common mode input range v in = 12v, run > 1.4v 0 4 v v diff_out(max) maximum diff_out voltage i diff_out = 300a intv cc C 1.4 v ltm4627 4627fc for more information www.linear.com/ltm4627
4 symbol parameter conditions min typ max units v os input offset voltage v osns + = v diff_out = 1.5v, i diff_out = 100a 2 mv a v differential gain (note 7) 1 v/v sr slew rate (note 6) 2 v/s gbp gain bandwidth product (note 6) 3 mhz cmrr common mode rejection (note 7) 60 db i diff_out diff_out current sourcing 2 ma psrr power supply rejection ratio 5v < v in < 20v (note 7) 100 db r in input resistance v osns + to gnd 80 k v pgood pgood trip level v fb with respect to set output v fb ramping negative v fb ramping positive C10 10 % % v pgl pgood voltage low i pgood = 2ma 0.1 0.3 v intv cc linear regulator v intvcc internal v cc voltage 6v < v in < 20v 4.8 5 5.2 v v intvcc load reg intv cc load regulation i cc = 0 to 50ma 0.5 % v extvcc external v cc switchover extv cc ramping positive l 4.5 4.7 v vldo ext extv cc voltage drop i cc = 25ma, v extvcc = 5v 50 100 mv oscillator and phase-locked loop f sync frequency sync capture range mode_pllin clock duty cycle = 50% 250 800 khz f nom nominal frequency v fset = 1.2v 450 500 550 khz f low lowest frequency v fset = 1v 350 400 450 khz f high highest frequency v fset 2.4v 700 770 850 khz i freq frequency set current 9 10 11 a r mode_pllin mode_pllin input resistance 250 k v ih_mode_pllin clock input level high 2.0 v v il_mode_pllin clock input level low 0.8 v electrical characteristics the l denotes the specifcations which apply over the specifed internal operating temperature range, otherwise specifcations are at t a = 25c (note 2), v in = 12v, per the typical application in figure 18. note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltm4627 is tested under pulsed load conditions such that t j t a . the ltm4627e is guaranteed to meet performance specifications over the 0c to 125c internal operating temperature range. specifications over the C40c to 125c internal operating temperature range are assured by design, characterization and correlation with statistical process controls. the ltm4627i is guaranteed to meet specifications over the C40c to 125c internal operating temperature range. the ltm4627mp is guaranteed and tested over the C55c to 125c internal operating temperature range. note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. note 3: the minimum on-time condition is specified for a peak-to-peak inductor ripple current of ~40% of i max load. (see the applications information section) note 4: see output current derating curves for different v in , v out and t a . note 5: limit current into the run pin to less than 2ma. note 6: guaranteed by design. note 7: 100% tested at wafer level. ltm4627 4627fc for more information www.linear.com/ltm4627
5 typical performance characteristics burst mode effciency pulse-skipping mode effciency 1.0v transient response 1.2v transient response 1.5v transient response 1.8v transient response effciency vs load current with 5v in effciency vs load current with 8v in effciency vs load current with 12v in 0 50 efficiency (%) 55 65 70 75 85 4 8 10 4627 g01 60 90 100 95 80 2 6 12 14 16 1v out at 400khz 1.2v out at 400khz 1.5v out at 400khz 2.5v out at 400khz 3.3v out at 650khz load current (a) 0 efficiency (%) 65 70 75 85 4 8 10 4627 g02 50 60 55 90 100 95 80 2 6 12 14 16 1v out at 400khz 1.2v out at 400khz 1.5v out at 400khz 2.5v out at 500khz 3.3v out at 600khz 5v out at 600khz load current (a) 0 50 efficiency (%) 55 65 70 75 85 4 8 10 4627 g03 60 90 100 95 80 2 6 12 14 16 1v out at 400khz 1.2v out at 400khz 1.5v out at 400khz 2.5v out at 650khz 3.3v out at 650khz 5v out at 700khz load current (a) v in = 12v, v out = 1.0v, c ff = 82pf, c comp = 33pf output capacitor = 5 100f ceramic x5r 100s/div 4627 g06 50mv/div 0a to 7.5a load step v in = 12v, v out = 1.2v, c ff = 82pf, c comp = 33pf output capacitor = 5 100f ceramic x5r 100s/div 4627 g07 50mv/div 0a to 7.5a load step v in = 12v, v out = 1.5v, c ff = 82pf, c comp = 33pf output capacitor = 5 100f ceramic x5r 100s/div 4627 g08 50mv/div 0a to 7.5a load step v in = 12v, v out = 1.8v, c ff = 82pf, c comp = 33pf output capacitor = 4 100f ceramic x5r 100s/div 4627 g09 50mv/div 0a to 7.5a load step 0.1 efficiency (%) 50 70 0.50.2 1.5 2 4627 g04 40 80 100 90 60 1 load current (a) 12v in , 2.5v out burst mode operation 5v in , 2.5v out burst mode operation 0.1 efficiency (%) 50 70 0.50.2 1.5 2 4627 g05 40 80 100 90 60 1 5v in , 2.5v out pulse-skipping mode load current (a) 12v in , 2.5v out pulse-skipping mode ltm4627 4627fc for more information www.linear.com/ltm4627
6 typical performance characteristics start-up with soft-start short-circuit protection no load short-circuit protection 15a load 2.5v transient response 3.3v transient response 5.0v transient response v in = 12v, v out = 1.5v, i out = 0a 4ms/div 4627 g14 500mv/div 1a/div v out i in v in = 12v, v out = 1.5v, i out = 15a 4ms/div 4627 g15 500mv/div 1a/div v out i in v in = 12v, v out = 2.5v, c ff = 82pf, c comp = 33pf output capacitor = 4 100f ceramic x5r 100s/div 4627 g10 50mv/div 0a to 7.5a load step v in = 12v, v out = 3.3v, c ff = 82pf, c comp = 33pf output capacitor = 2 100f ceramic x5r 100s/div 4627 g11 50mv/div 0a to 7.5a load step v in = 12v, v out = 5v, c ff = 82pf, c comp = 33pf output capacitor = 2 100f ceramic x5r 100s/div 4627 g12 50mv/div 0a to 7.5a load step v in = 12v, v out = 1.5v, i out = 15a input cap 150f sanyo electrolytic cap and 22f 2 x5r ceramic cap output cap 1 100f x5r ceramic and 470f sanyo poscap 0.1f cap from track/ss to gnd 50ms/div 500mv/div 5a/div 4627 g13 v out i out ltm4627 4627fc for more information www.linear.com/ltm4627
7 v in (a1-a6, b1-b6, c1-c6): power input pins. apply input voltage between these pins and gnd pins. recommend placing input decoupling capacitance directly between v in pins and gnd pins. v out (j1-j10, k1-k11, l1-l11, m1-m11): power output pins. apply output load between these pins and gnd pins. recommend placing output decoupling capacitance directly between these pins and gnd pins. review table 4. gnd (b7, b9, c7, c9, d1-d6, d8, e1-e7, e9, f1-f9, g1-g9, h1-h9): power ground pins for both input and output returns. pgood (f11, g12): output voltage power good indicator. open-drain logic output that is pulled to ground when the output voltage exceeds a 10% regulation window. both pins are tied together internally. sgnd (g11, h11, h12): signal ground pin. return ground path for all analog and low power circuitry. tie a single connection to the output capacitor gnd in the application. see layout guidelines in figure 17. mode_pllin (a8): forced continuous mode, burst mode operation, or pulse-skipping mode selection pin and external synchronization input to phase detector pin. connect this pin to intv cc to enable pulse-skipping mode of operation. connect to ground to enable forced continuous mode of operation. floating this pin will enable burst mode operation. a clock on this pin will enable synchronization with forced continuous operation. see the applications information section. f set (b12): a resistor can be applied from this pin to ground to set the operating frequency, or a dc voltage can be applied to set the frequency. see the applications information section. pin functions track/ss (a9): output voltage tracking pin and soft- start inputs. the pin has a 1.2a pull-up current source. a capacitor from this pin to ground will set a soft-start ramp rate. in tracking, the regulator output can be tracked to a different voltage. the different voltage is applied to a voltage divider then the slave outputs track pin. this voltage divider is equal to the slave outputs feedback divider for coincidental tracking. see the applications information section. v fb (f12): the negative input of the error amplifier. internally, this pin is connected to v out_lcl with a 60.4k precision resistor. different output voltages can be programmed with an additional resistor between v fb and ground pins. in polyphase ? operation, tying the v fb pins together allows for parallel operation. see the applications information section for details. comp (a11): current control threshold and error amplifier compensation point. the current comparator threshold increases with this control voltage. tie all comp pins together for parallel operation. the device is internally compensated. run: (a10) run control pin. a voltage above 1.4v will turn on the module. a 5.1v zener diode to ground is internal to the module for limiting the voltage on the run pin to 5v, and allowing a pull-up resistor to v in for enabling the device. limit current into the run pin to 2ma. intv cc : (a7, d9) internal 5v ldo for driving the control circuitry and the power mosfet drivers. both pins are internally connected. the 5v ldo has a 100ma current limit. extv cc (e12): external power input to an internal control switch allows an external source greater than 4.7v, but less than 6v to supply ic power and bypass the internal intv cc ldo. extv cc must be less than v in at all times during power-on and power-off sequences. see the ap - plications information section. ltm4627 4627fc for more information www.linear.com/ltm4627
8 pin functions v out_lcl : (l12) this pin connects to v out through a 1m resistor, and to v fb with a 60.4k resistor. the remote sense amplifier output diff_out is connected to v out_lcl , and drives the 60.4k top feedback resistor in remote sensing applications. when the remote sense amplifier is used, diff_out effectively eliminates the 1m from v out to v out_lcl . when the remote sense amplifier is not used, then connect v out_lcl to v out directly. v osns + : (j12) (+) input to the remote sense amplifier. this pin connects to the output remote sense point. the remote sense amplifier is used for v out 3.3v. connect to ground when not used. v osns C : (m12) (C) input to the remote sense amplifier. this pin connects to the ground remote sense point. the remote sense amplifier is used for v out 3.3v. connect to ground when not used. diff_out: (k12) output of the remote sense amplifier. this pin connects to the v out_lcl pin for remote sense applications. otherwise float when not used. mtp1, mtp2, mtp3, mtp4, mtp5, mtp6, mtp7, mtp8 (a12, b11, c10, c11, c12, d10, d11, d12): extra mount - ing pads used for increased solder integrity strength. leave floating. ltm4627 4627fc for more information www.linear.com/ltm4627
9 block diagram figure 1. simplifed ltm4627 block diagram power control c v out v in 5.1v 1m 60.4k f set run v fb sgnd comp v out_lcl r2 r1 mode_pllin track/ss r fset 100k r fb 90.9k c ss 4627 f01 0.47h m1 v out v out 1v 15a v in v in 4.5v to 20v m2 internal comp internal loop filter intv cc 250k diff_out v osns + v osns ? gnd pgood intv cc extv cc > 1.4v = on < 1.1v = off max = 5v ? ? + + 1.5f 10f + c in c out + 10k intv cc diff amp decoupling requirements symbol parameter conditions min typ max units c in external input capacitor requirement (v in = 4.5v to 20v, v out = 1.5v) i out = 15a 66 f c out external output capacitor requirement (v in = 4.5v to 20v, v out = 1.5v) i out = 15a 200 f t a = 25c. use figure 1 confguration. ltm4627 4627fc for more information www.linear.com/ltm4627
10 power module description the ltm4627 is a high performance single output stand - alone nonisolated switching mode dc/dc power supply. it can provide a 15a output with few external input and out put c apacitors. this module provides precisely regulated output voltages programmable via external resistors from 0.6v dc to 5v dc over a 4.5v to 20v input range. the typical application schematic is shown in figure 18. the ltm4627 has an integrated constant-frequency cur - rent mode regulator, power mosfets, 0.47h inductor, and other supporting discrete components. the switch - ing frequency range is from 400khz to 770khz, and the ty pic al operating frequency is 500khz. for switching noise-sensitive applications, it can be externally syn - chronized from 250khz to 800khz, subject to minimum on-time limitations. a single resistor is used to program the frequency . see the applications information section. with current mode control and internal feedback loop compensation, the ltm4627 module has suffcient stabil - ity margins and good transient performance with a wide range of output capacitors, even with all ceramic output capacitors. current mode control provides cycle-by-cycle fast current limit in an overcurrent condition. an internal overvoltage monitor protects the output voltage in the event of an operation overvoltage >10%. the top mosfet is turned off and the bottom mosfet is turned on until the output is cleared. pulling the run pin below 1.1v forces the regulator into a shutdown state. the track/ss pin is used for program - ming the output voltage ramp and voltage tracking during start-up. see the application information section. the l tm4627 is internally compensated to be stable over all operating conditions. t able 4 provides a guideline for input and output capacitances for several operating condi - tions. ltpowercad? is available for transient and stability analysis. the v fb pin is used to program the output voltage with a single external resistor to ground. a remote sense amplifer is provided for accurately sensing output voltages 3.3v at the load point. multiphase operation can be easily employed with the synchronization inputs using an external clock source. see application examples. high effciency at light loads can be accomplished with selectable burst mode operation using the mode_pllin pin. these light load features will accommodate battery operation. effciency graphs are provided for light load op - eration in the typical performance characteristics section. ltm4627 4627fc for more information www.linear.com/ltm4627
11 applications information the typical ltm4627 application circuit is shown in fig- ure 18. external component selection is primarily deter - mined by the maximum load current and output voltage. refer to t able 4 for specifc external capacitor requirements for particular applications. v in to v out step-down ratios there are restrictions in the v in to v out step-down ratio that can be achieved for a given input voltage. the v in to v out minimum dropout is a function of load current and at very low input voltage and high duty cycle applications output power may be limited as the internal top power mosfet is not rated for 15a operation at higher ambient temperatures. at very low duty cycles the minimum 90ns on-time must be maintained. see the frequency adjust - ment section and temperature derating curves. output voltage programming the p wm controller has an internal 0.6v 1% reference voltage. as shown in the block diagram, a 60.4k internal feedback resistor connects the v out_lcl and v fb pins together. when the remote sense amplifer is used, then diff_out is connected to the v out_lcl pin. if the remote sense amplifer is not used, then v out_lcl connects to v out . the output voltage will default to 0.6v with no feed - back resistor. adding a resistor r fb from v fb to ground programs the output voltage: v out = 0.6v 60.4k + r fb r fb table 1. v fb resistor table vs various output voltages v out (v) 0.6 1.0 1.2 1.5 1.8 2.5 3.3 5.0 r fb (k) open 90.9 60.4 40.2 30.1 19.1 13.3 8.25 for a given v out , r fb can be determined by: r fb = 60.4k v out 0.6v ? 1 for parallel operation of n ltm4627s, the following equa - tion can be used to solve for r fb : r fb = 60.4k / n v out 0.6v ? 1 tie the v fb pins together for each parallel output. the comp pins must be tied together also. input capacitors the ltm4627 module should be connected to a low ac- impedance dc source. additional input capacitors are needed for the rms input ripple current rating. the i cin(rms) equation which follows can be used to calculate the input capacitor requirement. typically 22f x7r ceramics are a good choice with rms ripple current ratings of ~ 2a each. a 47f to 100f surface mount aluminum electrolytic bulk capacitor can be used for more input bulk capacitance. this bulk input capacitor is only needed if the input source impedance is compromised by long inductive leads, traces or not enough source capacitance. if low impedance power planes are used, then this bulk capacitor is not needed. for a buck converter, the switching duty cycle can be estimated as: d = v out v in without considering the inductor ripple current, for each output, the rms current of the input capacitor can be estimated as: i cin(rms) = i out(max) % d (1? d) in the previous equation, % is the estimated effciency of the power module. the bulk capacitor can be a switcher- rated electrolytic aluminum capacitor or a polymer capacitor. ltm4627 4627fc for more information www.linear.com/ltm4627
12 output capacitors the ltm4627 is designed for low output voltage ripple noise. the bulk output capacitors defned as c out are chosen with low enough effective series resistance (esr) to meet the output voltage ripple and transient require - ments. c out can be a low esr tantalum capacitor, low esr polymer capacitor or ceramic capacitors. the typical output capacitance range is from 200f to 800f. additional output fltering may be required by the system designer if further reduction of output ripple or dynamic transient spikes is required. table 4 shows a matrix of different output voltages and output capacitors to minimize the voltage droop and overshoot during a 7.5a/s transient. the table optimizes total equivalent esr and total bulk capacitance to optimize the transient performance. stability criteria are considered in the table 4 matrix, and ltpowercad is available for stability analysis. multiphase operation will reduce effective output ripple as a function of the number of phases. application note 77 discusses this noise reduction versus output ripple current cancellation, but the output capacitance should be considered carefully as a function of stability and transient response. ltpowercad can be used to calculate the output ripple reduction as the number of implemented phases increases by n times. burst mode operation the ltm4627 is capable of burst mode operation in which the power mosfets operate intermittently based on load demand, thus saving quiescent current. for applications where maximizing the effciency at very light loads is a high priority, burst mode operation should be applied. to enable burst mode operation, simply foat the mode_pllin pin. during burst mode operation, the peak current of the inductor is set to approximately 30% of the maximum peak current value in normal operation even though the voltage at the comp pin indicates a lower value. the voltage at the comp pin drops when the inductors average current is greater than the load requirement. as the comp voltage drops below 0.5v, the burst comparator trips, causing the internal sleep line to go high and turn off both power mosfets. in sleep mode, the internal circuitry is partially turned off, reducing the quiescent current. the load current is now being supplied from the output capacitors. when the output voltage drops, causing comp to rise, the internal sleep line goes low, and the ltm4627 resumes normal operation. the next oscillator cycle will turn on the top power mosfet and the switching cycle repeats. pulse-skipping mode operation in applications where low output ripple and high eff - ciency at intermediate currents are desired, pulse-skipping mode should be used. pulse-skipping operation allows the l tm4627 to skip cycles at low output loads, thus increasing effciency by reducing switching loss. t ying the mode_pllin pin to intv cc enables pulse-skipping operation. with pulse-skipping mode at light load, the internal current comparator may remain tripped for several cycles, thus skipping operation cycles. this mode has lower ripple than burst mode operation and maintains a higher frequency operation than burst mode operation. forced continuous operation in applications where fxed frequency operation is more critical than low current effciency, and where the lowest output ripple is desired, forced continuous operation should be used. forced continuous operation can be enabled by tying the mode_pllin pin to ground. in this mode, inductor current is allowed to reverse during low output loads, the comp voltage is in control of the current comparator threshold throughout, and the top mosfet always turns on with each oscillator pulse. during start-up, forced continuous mode is disabled and inductor current is prevented from reversing until the ltm4627s output voltage is in regulation. applications information ltm4627 4627fc for more information www.linear.com/ltm4627
13 multiphase operation for outputs that demand more than 15a of load current, multiple ltm4627 devices can be paralleled to provide more output current without increasing input and output ripple voltage. the mode_pllin pin allows the ltm4627 to be synchronized to an external clock and the internal phase-locked loop allows the ltm4627 to lock onto input clock phase as well. the f set resistor is selected for nor - mal frequency, then the incoming clock can synchronize the device over the specifed range. see figure 20 for a synchronizing example cir cuit. a multiphase power supply signifcantly reduces the amount of ripple current in both the input and output ca - pacitors. the rms input ripple current is reduced by, and the effective ripple frequency is multiplied by , the number of phases used (assuming that the input voltage is greater than the number of phases used times the output voltage). the output ripple amplitude is also reduced by the number of phases used. see application note 77. the l tm4627 device is an inherently current mode con - trolled device, so parallel modules will have good current sharing. this will balance the thermals in the design. t ie the comp and v fb pins of each ltm4627 together to share the current evenly. figure 20 shows a schematic of the parallel design. input rms ripple current cancellation application note 77 provides a detailed explanation of multiphase operation. the input rms ripple current can - cellation mathematical derivations are presented, and a graph is displayed representing the rms ripple current reduction as a function of the number of interleaved phases (see figure 2). pll, frequency adjustment and synchronization the l tm4627 switching frequency is set by a resistor (r fset ) from the f set pin to signal ground. a 10a current (i freq ) fowing out of the f set pin through r fset develops a volt - age on f set . r fset can be calculated as: r fset = freq 500khz / v + 0.2v ? ? ? ? ? ? 1 10a the relationship of f set voltage to switching frequency is shown in figure 3. for low output voltages from 0.8v to 1.5v, 400khz operation is an optimal frequency for the best power conversion effciency while maintaining the induc - tor ripple current to about 30% to 40% of maximum load current. for output voltages from 1.8v to 3.0v , 500khz to 600khz is optimal. for output voltages from 3.0v to 5.0v , 750khz operation is optimal, but due to the higher ripple current at 5v operation the output current is limited to 10a. the ltm4627 can be synchronized from 250khz to 800khz with an input clock that has a high level above 2v and a low level below 0.8v. however, a 400khz low end operating frequency is recommended to limit inductor ripple current. see the typical applications section for synchronization examples. the ltm4627 minimum on-time is limited to approximately 90ns. guardband the on-time to 130ns. the on-time can be calculated as: t on(min) = 1 freq ? v out v in ? ? ? ? ? ? output voltage tracking output voltage tracking can be programmed externally using the track/ss pin. the output can be tracked up and down with another regulator. the master regulators output is divided down with an external resistor divider that is the same as the slave regulators feedback divider to implement coincident tracking. the ltm4627 uses an accurate 60.4k resistor internally for the top feedback resistor. figure 4 shows an example of coincident tracking. v out(slave) = 1+ 60.4k r ta ? ? ? ? ? ? ? v track v track is the track ramp applied to the slaves track pin. v track has a control range of 0v to 0.6v, or the internal reference voltage. when the masters output is divided down with the same resistor values used to set the slaves output, then the slave will coincident track with the master until it reaches its fnal value. the master will continue to applications information ltm4627 4627fc for more information www.linear.com/ltm4627
14 applications information figure 3. relationship between switching frequency and voltage at the f set pin figure 2. normalized input rms ripple current vs duty factor for one to six module regulators (phases) 0.75 0.8 4627 f02 0.70.650.60.550.50.450.40.350.30.250.20.150.1 0.85 0.9 duty factor (v out /v in ) 0 dc load current rms input ripple current 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.55 0.60 1 phase 2 phase 3 phase 4 phase 6 phase f set pin voltage (v) 0 switching frequency (khz) 0.5 1 1.5 2 4627 f03 2.5 0 100 300 400 500 900 800 700 200 600 ltm4627 4627fc for more information www.linear.com/ltm4627
15 its fnal value from the slaves regulation point. voltage tracking is disabled when v track is more than 0.6v. r ta in figure 4 will be equal to the r fb for coincident tracking. the track/ss pin of the master can be controlled by an external ramp or the soft-start function of that regulator can be used to develop that master ramp. the ltm4627 can be used as a master by setting the ramp rate on its track pin using a soft-start capacitor. a 1.2a current source is used to charge the soft-start capacitor. the following equation can be used: t soft-start = 0.6v ? c ss 1.2a ? ? ? ? ? ? ratiometric tracking can be achieved by a few simple calculations and the slew rate value applied to the masters track/ss pin. as mentioned above, the track/ss pin has a control range from 0v to 0.6v. the masters track/ ss pin slew rate is directly equal to the master s output slew rate in volts/time. the equation: mr sr 60.4k = r tb where mr is the masters output slew rate and sr is the slaves output slew rate in volts/time. when coincident tracking is desired, then mr and sr are equal, thus r tb is equal to 60.4k. r ta is derived from equation: r ta = 0.6v v fb 60.4k + v fb r fb ? v track r tb where v fb is the feedback voltage reference of the regula - tor, and v track is 0.6v. since r tb is equal to the 60.4k applications information figure 4. dual outputs (1.5v and 1.2v) with coincident tracking comp track/ss run f set mode_pllin pgood v out v out_lcl diff_out v osns + v osns ? v fb ltm4627 v in r2 10k r fb1 40.2k r4 100k c10 22f 16v c7 22f 16v 82pf c ss soft-start capacitor 470f 6.3v 100f 6.3v v out2 1.5v at 15a c8 c11 c9 22f 16v intv cc extv cc v in 6v to 16v sgnd gnd + comp track/ss run f set mode_pllin pgood v out v out_lcl diff_out v osns + v osns ? v fb ltm4627 v in r1 10k r fb 60.4k r3 100k c2 22f 16v c3 22f 16v 82pf 470f 6.3v 100f 6.3v v out1 1.2v 15a c4 c6 c1 22f 16v intv cc extv cc 4627 f04 sgnd gnd + r tb 60.4k r ta 60.4k master ramp or output v in 6v to 16v 150pf 150pf ltm4627 4627fc for more information www.linear.com/ltm4627
16 top feedback resistor of the slave regulator in equal slew rate or coincident tracking, then r ta is equal to r fb with v fb = v track . therefore r tb = 60.4k, and r ta = 60.4k in figure 4. in ratiometric tracking, a different slew rate maybe desired for the slave regulator. r tb can be solved for when sr is slower than mr. make sure that the slave supply slew rate is chosen to be fast enough so that the slave output voltage will reach its fnal value before the master output. for example, mr = 1.5v/ms, and sr = 1.2v/ms. then r tb = 75k. solve for r ta to equal 51.1k. for applications that do not require tracking or sequenc - ing, simply tie the track/ss pin to intv cc to let run control the turn on/off. when the run pin is below its threshold or the v in undervoltage lockout, then track/ ss is pulled low. figure 5. output voltage coincident tracking applications information overcurrent and overvoltage protection the ltm4627 has overcurrent protection (ocp) in a short circuit. the internal current comparator threshold folds back during a short to reduce the output current. an overvoltage condition (ovp) above 10% of the regu - lated output voltage will force the top mosfet off and the bottom mosfet on until the condition is cleared. 4627 f05 time slave output master output output voltage an input electronic circuit breaker or fuse can be sized to be tripped or cleared when the bottom mosfet is turned on to protect against the overvoltage. foldback current limiting is disabled during soft-start or tracking start-up. run enable the run pin is used to enable the power module or sequence the power module. the threshold is 1.25v, and the pin has an internal 5.1v zener to protect the pin. the run pin can be used as an undervoltage lockout (uvlo) function by connecting a resistor divider from the input supply to the run pin: v uvlo = ((r1+r2)/r2) ? 1.25v. see the block diagram for the example of use. intv cc regulator the ltm4627 has an internal low dropout regulator from v in called intv cc . this regulator output has a 4.7f ceramic capacitor internal. this regulator powers the internal controller and mosfet drivers. the gate driver current is ~20ma for 750khz operation. the regulator loss can be calculated as: (v in ? 5v) 20ma = p loss extv cc external voltage source 4.7v can be applied to this pin to eliminate the internal intv cc ldo power loss and increase regulator effciency. a 5v supply can be applied to run the internal circuitry and power mosfet driver. if unused, leave pin foating. extv cc must be less than v in at all times during power-on and power-off sequences. stability compensation the ltm4627 has already been internally compensated for all output voltages. table 4 is provided for most application requirements. ltpowercad is available for other control loop optimization. ltm4627 4627fc for more information www.linear.com/ltm4627
17 applications information thermal considerations and output current derating the thermal resistances reported in the pin confgura - tion section of the data sheet are consistent with those parameters defned by jesd 51-12 and are intended for use with fnite element analysis (fea) software modeling tools that leverage the outcome of thermal modeling, simu - lation, and correlation to hardware evaluation performed on a module package mounted to a hardware test board defned by jesd 51-9 (test boards for area array surface mount package thermal measurements). the motiva - tion for providing these thermal coeffcients is found in jesd 51-12 (guidelines for reporting and using electronic package thermal information). many designers, in lieu of or to compliment any fea ac - tivities, may opt to use laboratory equipment and a test vehicle such as the demo board to anticipate the module regulator s thermal performance in their application at various electrical and environmental operating conditions. without fea software, the thermal resistances reported in the pin confguration section are in-and-of themselves not relevant to providing guidance of thermal performance; instead, the derating curves provided later in this data sheet can be used in a manner that yields insight and guidance pertaining to ones application-usage, and can be adapted to correlate thermal performance to ones own application. the pin confguration section gives four thermal coeff - cients explicitly defned in jesd 51-12; these coeffcients are quoted or paraphrased below: 1 ja , the thermal resistance from junction to ambient, is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclo - sure. this environment is sometimes referred to as still air although natural convection causes the air to move. this value is determined with the part mounted to a jesd 51-9 defned test board, which does not refect an actual application or viable operating condition. 2 jcbottom , the thermal resistance from junction to the bottom of the product case, is determined with all of the component power dissipation fowing through the bottom of the package. in the typical module regulator, the bulk of the heat fows out the bottom of the pack - age, but there is always heat fow out into the ambient environment. as a result, this thermal resistance value may be useful for comparing packages but the test conditions dont generally match the users application. 3 jctop , the thermal resistance from junction to top of the product case, is determined with nearly all of the component power dissipation fowing through the top of the package. as the electrical connections of the typical module regulator are on the bottom of the package, it is rare for an application to operate such that most of the heat fows from the junction to the top of the part. as in the case of jcbottom , this value may be useful for comparing packages but the test conditions dont generally match the users application. 4 jb , the thermal resistance from junction to the printed circuit board, is the junction-to-board thermal resis - tance where almost all of the heat fows through the bottom of the module package and into the board, and is really the sum of the jcbottom and the thermal resistance of the bottom of the part through the solder joints and through a portion of the board. the board temperature is measured at a specifed distance from the package, using a two sided, two layer board. this board is described in jesd 51-9. a graphical representation of the aforementioned ther - mal resistances is given in figure 6; blue resistances are contained within the module regulator, whereas green resistances are external to the module package. as a practical matter, it should be clear to the reader that no individual or sub-group of the four thermal resistance parameters defned by jesd 51-12 or provided in the pin confguration section replicates or conveys normal operating conditions of a module regulator. for example, in normal board-mounted applications, never does 100% of the devices total power loss (heat) thermally conduct exclusively through the top or exclusively through bot - tom of the module packageas the standard defnes for jctop and jcbottom , respectively. in practice, power loss is thermally dissipated in both directions away from the packagegranted, in the absence of a heat sink and airfow, a majority of the heat fow is into the board. ltm4627 4627fc for more information www.linear.com/ltm4627
18 applications information within the ltm4627, be aware there are multiple power devices and components dissipating power, with a con - sequence that the thermal resistances relative to different junctions of components or die are not exactly linear with respect to total package power loss. t o reconcile this complication without sacrifcing modeling simplicity but also, not ignoring practical realitiesan approach has been taken using fea software modeling along with laborator y testing in a controlled-environment chamber to reasonably defne and correlate the thermal resistance values supplied in this data sheet: (1) initially, fea software is used to accurately build the mechanical geometry of the ltm4627 and the specifed pcb with all of the correct material coeffcients along with accurate power loss source defnitions; (2) this model simulates a software-defned jedec environment consistent with jesd 51-12 to predict power loss heat fow and temperature readings at different interfaces that enable the calculation of the jedec-defned thermal resistance values; (3) the model and fea software is used to evaluate the ltm4627 with heat sink and airfow; (4) having solved for and analyzed these thermal resis - tance values and simulated various operating conditions in the software model, a thorough laborator y evaluation replicates the simulated conditions with thermocouples within a controlled-environment chamber while operat - ing the device at the same power loss as that which was simulated. an outcome of this process and due diligence yields the set of derating curves shown in this data sheet. the 1.2v and 3.3v power loss curves in figures 7 and 8 can be used in coordination with the load current derating curves in figures 9 to 16 for calculating an approximate ja thermal resistance for the ltm462 7 with various heat sinking and airfow conditions. the power loss curves are taken at room temperature, and are increased with multiplicative factors according to the ambient tempera - ture. these approximate factors are: 1 for 40c; 1.05 for 5 0 c; 1.1 for 60c; 1.15 for 70c; 1.2 for 80c; 1.25 for 90c; 1.3 for 100c; 1.35 for 110c and 1.4 for 120c. the derating curves are plotted with the output current starting at 15a and the ambient temperature at 40c. the output voltages are 1.2v, and 3.3v. these are chosen to include the lower and higher output voltage ranges for correlating the thermal resistance. thermal models are derived from several temperature measurements in a con - trolled temperature chamber along with thermal modeling ana lysis. the junction temperatures are monitored while ambient temperature is increased with and without airfow. the power loss increase with ambient temperature change is fac tored into the derating curves. the junctions are maintained at 120c maximum while lowering output current or power with increasing ambient temperature. the decreased output current will decrease the inter - nal module loss as ambient temperature is increased. the monitored junction temperature of 120c minus t h e ambient operating temperature specifes how much module temperature rise can be allowed. as an example in 80421 f05 module device junction-to-case (top) resistance junction-to-board resistance junction-to-ambient resistance (jesd 51-9 defined board) case (top)-to-ambient resistance board-to-ambient resistance junction-to-case (bottom) resistance junction a t case (bottom)-to-board resistance figure 6. graphical representation of jesd 51-12 thermal coeffcients ltm4627 4627fc for more information www.linear.com/ltm4627
19 figure 7. 1.2v out power loss at 25c figure 8. 3.3v out power loss at 25c 0 0.5 1.5 4627 f07 2.0 3.0 2.5 1.0 0 1 2 3 4 5 6 87 9 10 11 12 13 14 15 power loss (w) output current (a) 5v in to 1.2v out power loss 12v in to 1.2v out power loss 0 1 3 4627 f08 4 6 5 2 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 power loss (w) output current (a) 5v in to 3.3v out power loss 12v in to 3.3v out power loss applications information figure 10. 5v in to 1.2v out with heat sink 0 2 6 4627 f10 8 16 14 12 10 4 0 lfm 200 lfm 400 lfm 40 50 60 70 80 90 100 110 120 130 ambient temperature (c) output current (a) figure 9. 5v in to 1.2v out no heat sink 0 2 6 4627 f09 8 16 14 12 10 4 0 lfm 200 lfm 400 lfm 5040 60 70 80 90 100 110 120 130 ambient temperature (c) output current (a) figure 11 the load current is derated to ~12a at ~80c with no air or heat sink and the power loss for the 12v to 1.2v at 12a output is about 2.8w. the 2.8w loss is calculated with the ~2.35w room temperature loss from the 12v to 1.2v power loss curve at 12a, and the 1.2 multiplying factor at 80c ambient. if the 80c ambient temperature is subtracted from the 120c junction temperature, then the difference of 40c divided by 2.8w equals a 14c/w ja thermal resistance. table 2 specifes a 13c/w value which is very close. table 2 and table 3 provide equivalent thermal resistances for 1.2v and 3.3v outputs with and without airfow and heat sinking. the derived thermal resistances in tables 2 and 3 for the various conditions can b e m ultiplied by the calculated power loss as a function of ambient temperature to derive temperature rise above ambient, thus maximum junction temperature. room temperature power loss can be derived from the effciency curves in the typical performance characteristics section and adjusted with the above ambient temperature multipli - cative factors. the printed circuit board is a 1.6mm thick f o ur layer board with two ounce copper for the two outer layers and one ounce copper for the two inner layers. the pcb dimensions are 95mm 76mm. the bga heat sinks are listed in table 4. ltm4627 4627fc for more information www.linear.com/ltm4627
20 figure 13. 5v in to 3.3v out no heat sink figure 14. 5v in to 3.3v out with heat sink figure 16. 12v in to 3.3v out with heat sink figure 15. 12v in to 3.3v out no heat sink applications information 0 2 6 4627 f13 8 14 12 10 4 0 lfm 200 lfm 400 lfm 40 50 60 70 80 90 100 110 120 130 ambient temperature (c) output current (a) 0 2 6 4627 f14 8 14 12 10 4 0 lfm 200 lfm 400 lfm 40 50 60 70 80 90 100 110 120 130 ambient temperature (c) output current (a) 0 2 6 4627 f15 8 16 12 14 10 4 0 lfm 200 lfm 400 lfm 40 50 60 70 80 90 100 110 120 130 ambient temperature (c) output current (a) 0 2 6 4627 f16 8 16 12 14 10 4 0 lfm 200 lfm 400 lfm 40 50 60 70 80 90 100 110 120 130 ambient temperature (c) output current (a) figure 12. 12v in to 1.2v out with heat sink 0 2 6 4627 f12 8 16 14 12 10 4 0 lfm 200 lfm 400 lfm 40 50 60 70 80 90 100 110 120 130 ambient temperature (c) output current (a) figure 11. 12v in to 1.2v out no heat sink 0 2 6 4627 f10 8 16 14 12 10 4 0 lfm 200 lfm 400 lfm 40 50 60 70 80 90 100 110 120 130 ambient temperature (c) output current (a) ltm4627 4627fc for more information www.linear.com/ltm4627
21 table 2. 1.2v output derating curve v in power loss curve airflow (lfm) heat sink ja (c/w) * figures 9, 11 5v, 12v figure 7 0 none 13 figures 9, 11 5v, 12v figure 7 200 none 11 figures 9, 11 5v, 12v figure 7 400 none 8 figures 10, 12 5v, 12v figure 7 0 bga heat sink 12 figures 10, 12 5v, 12v figure 7 200 bga heat sink 8 figures 10, 12 5v, 12v figure 7 400 bga heat sink 7 table 3. 3.3v output derating curve v in power loss curve airflow (lfm) heat sink ja (c/w) * figures 13, 15 5v, 12v figure 8 0 none 13 figures 13, 15 5v, 12v figure 8 200 none 11 figures 13, 15 5v, 12v figure 8 400 none 8 figures 14, 16 5v, 12v figure 8 0 bga heat sink 12 figures 14, 16 5v, 12v figure 8 200 bga heat sink 8 figures 14, 16 5v, 12v figure 8 400 bga heat sink 7 * ja derived from laboratory measurements using a 95mm 76mm pcb with 4 layers. two outer layers are 2oz copper and two inner layers are 1oz copper. pcb thickness is 1.6mm. bga heat sink references are listed in table 4. applications information ltm4627 4627fc for more information www.linear.com/ltm4627
22 applications information heat sink manufacturer part number website aavid thermalloy 375424b00034g www.aavidthermalloy.com cool innovations 4-050503p to 4-050508p www.coolinnovations.com table 4. output voltage response vs component matrix (refer to figure 18) 0a to 7.5a load step c out1 and c out2 ceramic vendor value part number c out1 and c out2 bulk vendor value part number c in bulk vendor v alue part number tdk 22f 6.3v c3216x7soj226m sanyo poscap 1000f 2.5v 2r5tpd1000m5 sanyo 56f 25v 25svp56m murata 22f 16v grm31cr61c226ke15l sanyo poscap 470f 2.5v 2r5tpd470m5 tdk 100f 6.3v c4532x5roj107mz sanyo poscap 470f 6.3v 6tpd470m murata 100f 6.3v grm32er60j107m sanyo poscap v out (v) c in (ceramic) c in (bulk)** c out1 (ceramic) and c out2 (cer and bulk) c ff (pf) c comp (pf) v in (v) droop (mv) peak to peak deviation (mv) recover y time(s) load step (a/s) r fb (k) freq. (khz) 1 22f 3 56f 100f 2, 1000f 68 150 5,12 50 100 30 7.5 90.9 400 1 22f 3 56f 100f 2, 470f 2 82 150 5,12 50 100 20 7.5 90.9 400 1 22f 3 56f 100f 4 82 33 5,12 52 108 18 7.5 90.9 400 1.2 22f 3 56f 100f 2, 1000f 82 150 5,12 40 80 20 7.5 60.4 400 1.2 22f 3 56f 100f, 470f 82 150 5,12 60 120 20 7.5 60.4 400 1.2 22f 3 56f 100f 2, 470f 2 82 150 5,12 40 80 25 7.5 60.4 400 1.2 22f 3 56f 100f 4 82 33 5,12 50 114 20 7.5 60.4 400 1.5 22f 3 56f 100f 2, 1000f 82 150 5,12 60 120 23 7.5 40.2 400 1.5 22f 3 56f 100f, 470f 82 47 5,12 67 130 20 7.5 40.2 400 1.5 22f 3 56f 100f 2, 470f 2 82 150 5,12 60 120 25 7.5 40.2 400 1.5 22f 3 56f 100f 3 82 33 5,12 65 130 20 7.5 40.2 400 1.8 22f 3 56f 100f 2, 1000f 68 150 5,12 64 130 25 7.5 30.1 400 1.8 22f 3 56f 100f, 470f 82 150 5,12 76 135 22 7.5 30.1 400 1.8 22f 3 56f 100f 2 82 none 5,12 66 132 20 7.5 30.1 400 2.5 22f 3 56f 100f 2 82 none 5,12 88 164 30 7.5 19.1 500 2.5 22f 3 56f 100f, 470f 82 150 5,12 100 200 25 7.5 19.1 500 3.3 22f 3 56f 100f 2 82 none 5,12 100 200 30 7.5 13.3 600 3.3 22f 3 56f 100f, 470f 82 150 5,12 100 200 30 7.5 13.3 600 5 22f 3 56f 100f 2 68 none 12 125 250 20 7.5 8.25 700 5 22f 3 56f 470f 47 150 12 125 250 25 7.5 8.25 700 ** bulk capacitance is optional if v in has very low input impedance. ltm4627 4627fc for more information www.linear.com/ltm4627
23 applications information safety considerations the ltm4627 modules do not provide isolation from v in to v out . there is no internal fuse. if required, a slow blow fuse with a rating twice the maximum input current needs to be provided to protect each unit from catastrophic failure. the device does support overvoltage protection and overcurrent protection. layout checklist/example the high integration of the ltm4627 makes the pcb board layout very simple and easy. however, to optimize its electrical and thermal performance, some layout con - siderations are still necessary. ? use large pcb copper areas for high current paths, including v in , gnd and v out . it helps to minimize the pcb conduction loss and thermal stress. ? place high frequency ceramic input and output capaci - tors next to the v in , gnd and v out pins to minimize high frequency noise. ? place a dedicated power ground layer underneath the unit. ? to minimize the via conduction loss and reduce module thermal stress, use multiple vias for interconnection between top layer and other power layers. ? do not put vias directly on the pad, unless they are capped or plated over. ? place test points on signal pins for testing. ? use a separated sgnd ground copper area for com - ponents connected to signal pins. connect the sgnd to gnd underneath the unit. ? for parallel modules, tie the comp and v fb pins to - gether. use an internal layer to closely connect these pins together . figure 17 gives a good example of the recommended layout. lga and bga pcb layouts are identical with the exception of circle pads for bga (see package description). figure 17. recommended pcb layout (lga shown, for bga use circle pads) gnd v in control 4627 f17 control control signal ground v out v out c out c out c in c in ltm4627 4627fc for more information www.linear.com/ltm4627
24 typical applications figure 18. 4.5v to 20v in , 1.5v at 15a design comp track/ss run f set mode_pllin pgood v out v out_lcl diff_out v osns + v osns ? v fb ltm4627 v in r1 10k r fb 40.2k r3 120k c2 22f 25v c comp 150pf c3 22f 25v c ff 82pf c7 0.1f 470f 6.3v 2 100f 6.3v v out 1.5v 15a c out1 c out2 * c1 22f 25v intv cc extv cc continuous mode *see table 4 4627 f18 v in 4.5v to 20v sgnd gnd + ltm4627 4627fc for more information www.linear.com/ltm4627
25 figure 19. 1v at 30a, two parallel outputs with 2-phase operation typical applications comp track/ss run f set mode_pllin pgood v out v out_lcl diff_out v osns + v osns ? v fb ltm4627 v in r fb1 45.3k r2 10k v in 7v to 16v c10 22f 16v c7 22f 16v r1 200k c13 0.1f 470f 6.3v 100f 6.3v c8 c11 c9 22f 16v intv cc intv cc clock sync 0 phase clock sync 180 phase sgnd gnd c14 1f + extv cc comp track/ss run f set mode_pllin pgood v out v out_lcl diff_out v osns + v osns ? v fb ltm4627 v in c2 22f 16v c3 22f 16v 470f 6.3v 100f 6.3v c4 c6 c1 22f 16v intv cc extv cc 4627 f19 sgnd gnd + v + gnd set out1 out2 mod ltc6908-1 1v at 30a 100k 100k 150pf 270pf intv cc ltm4627 4627fc for more information www.linear.com/ltm4627
26 typical applications figure 20. 1.2v, 60a, current sharing with 4-phase operation comp track/ss run f set mode_pllin pgood v out v out_lcl diff_out v osns + v osns ? v fb ltm4627 v in r fb2 15k r1 10k c22 22f 16v r2 100k 4-phase clock c28 0.1f 270pf 470f 6.3v v in 7v to 16v v out 1.2v at 60a 100f 6.3v c21 c24 c20 22f 16v intv cc sgnd gnd c2 1f + extv cc comp track/ss run f set mode_pllin pgood v out v out_lcl diff_out v osns + v osns ? v fb ltm4627 v in c18 22f 16v 470f 6.3v 100f 6.3v c15 c18 c14 22f 16v intv cc intv cc intv cc sgnd gnd + extv cc v + div ph out1 out2 set mod gnd out4 out3 ltc6902 comp track/ss run f set mode_pllin pgood v out v out_lcl diff_out v osns + v osns ? v fb ltm4627 v in c9 22f 16v 470f 6.3v 100f 6.3v c8 c11 c7 22f 16v intv cc sgnd gnd + extv cc comp track/ss run f set mode_pllin pgood v out v out_lcl diff_out v osns + v osns ? v fb ltm4627 v in c1 22f 16v 470f 6.3v 100f 6.3v c4 c6 c3 22f 16v intv cc 4627 f20 sgnd gnd + extv cc 100k 100k 100k 100k 150pf 150pf ltm4627 4627fc for more information www.linear.com/ltm4627
27 package description pin name pin name pin name pin name pin name pin name a1 v in b1 v in c1 v in d1 gnd e1 gnd f1 gnd a2 v in b2 v in c2 v in d2 gnd e2 gnd f2 gnd a3 v in b3 v in c3 v in d3 gnd e3 gnd f3 gnd a4 v in b4 v in c4 v in d4 gnd e4 gnd f4 gnd a5 v in b5 v in c5 v in d5 gnd e5 gnd f5 gnd a6 v in b6 v in c6 v in d6 gnd e6 gnd f6 gnd a7 int v cc b7 gnd c7 gnd d7 - e7 gnd f7 gnd a8 mode_pllin b8 - c8 - d8 gnd e8 - f8 gnd a9 track/ss b9 gnd c9 gnd d9 int v cc e9 gnd f9 gnd a10 run b10 - c10 mtp3 d10 mtp6 e10 - f10 - a11 comp b11 mtp2 c11 mtp4 d11 mtp7 e11 - f11 pgood a12 mtp1 b12 f set c12 mtp5 d12 mtp8 e12 ext v cc f12 v fb pin name pin name pin name pin name pin name pin name g1 gnd h1 gnd j1 v out k1 v out l1 v out m1 v out g2 gnd h2 gnd j2 v out k2 v out l2 v out m2 v out g3 gnd h3 gnd j3 v out k3 v out l3 v out m3 v out g4 gnd h4 gnd j4 v out k4 v out l4 v out m4 v out g5 gnd h5 gnd j5 v out k5 v out l5 v out m5 v out g6 gnd h6 gnd j6 v out k6 v out l6 v out m6 v out g7 gnd h7 gnd j7 v out k7 v out l7 v out m7 v out g8 gnd h8 gnd j8 v out k8 v out l8 v out m8 v out g9 gnd h9 gnd j9 v out k9 v out l9 v out m9 v out g10 - h10 - j10 v out k10 v out l10 v out m10 v out g11 sgnd h11 sgnd j11 - k11 v out l11 v out m11 v out g12 pgood h12 sgnd j12 v osns + k12 diff_out l12 v out_lcl m12 v osns C pin assignment table (arranged by pin number) ltm4627 4627fc for more information www.linear.com/ltm4627
28 package photos 15mm 15mm 4.32mm 15mm 15mm 4.92mm lga bga ltm4627 4627fc for more information www.linear.com/ltm4627
29 package description bga package 133-lead (15mm 15mm 4.92mm) (reference ltc dwg # 05-08-1897 rev ?) notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters ball designation per jesd ms-028 and jep95 5. primary datum -z- is seating plane 4 3 details of pin #1 identifier are optional, but must be located within the zone indicated. the pin #1 identifier may be either a mold or marked feature package top view 4 pin ?a1? corner x y aaa z aaa z package bottom view pin 1 3 see notes suggested pcb layout top view bga 133 0511 rev ? ltmxxxxxx module tray pin 1 bevel package in tray loading orientation component pin ?a1? detail a 0.0000 0.0000 detail a ?b (133 places) detail b substrate 0.27 ? 0.37 3.95 ? 4.05 // bbb z d a a1 b1 ccc z detail b package side view mold cap z m x yzddd m zeee 0.630 0.025 ? 133x symbol a a1 a2 b b1 d e e f g aaa bbb ccc ddd eee min 4.72 0.50 4.22 0.60 0.60 nom 4.92 0.60 4.32 0.75 0.63 15.0 15.0 1.27 13.97 13.97 max 5.12 0.70 4.42 0.90 0.66 0.15 0.10 0.20 0.30 0.15 notes dimensions total number of balls: 133 e b e e b a2 f g bga package 133-lead (15mm 15mm 4.92mm) (reference ltc dwg # 05-08-1897 rev ?) 0.6350 0.6350 1.9050 1.9050 3.1750 3.1750 4.4450 4.4450 5.7150 5.7150 6.9850 6.9850 6.9850 5.7150 5.7150 4.4450 4.4450 3.1750 3.1750 1.9050 1.9050 0.6350 0.6350 6.9850 fgh m l jk e abcd 2 1 4 3 5 6 7 12 8 9 10 11 please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. ltm4627 4627fc for more information www.linear.com/ltm4627
30 package description notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters land designation per jesd mo-222, spp-010 5. primary datum -z- is seating plane 6. the total number of pads: 133 4 3 details of pad #1 identifier are optional, but must be located within the zone indicated. the pad #1 identifier may be either a mold or marked feature symbol aaa bbb eee tolerance 0.15 0.10 0.05 4.22 ? 4.42 detail b detail b substrate mold cap 0.27 ? 0.37 3.95 ? 4.05 bbb z z 15 bsc package top view 15 bsc 4 pad 1 corner x y aaa z aaa z detail a 13.97 bsc 1.27 bsc 13.97 bsc 0.12 ? 0.28 l k j h g f e d c b package bottom view c(0.30) pad 1 3 pads see notes m a 1 2 3 4 5 6 7 8 10 9 11 12 detail a 0.630 0.025 sq. 133x s yxeee suggested pcb layout top view 0.0000 0.6350 0.6350 1.9050 1.9050 3.1750 3.1750 4.4450 4.4450 5.7150 5.7150 6.9850 6.9850 6.9850 5.7150 5.7150 4.4450 4.4450 3.1750 3.1750 1.9050 1.9050 0.6350 0.6350 0.0000 6.9850 lga 133 1008 rev ? ltmxxxxxx module tray pin 1 bevel package in tray loading orientation component pin ?a1? 0.630 0.630 lga package 133-lead (15mm 15mm 4.32mm) (reference ltc dwg # 05-08-1777 rev ?) please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. ltm4627 4627fc for more information www.linear.com/ltm4627
31 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number a 2/11 updated the electrical characteristics section. updated graph g13. updated the inductor value in the block diagram and in the power module description section. updated the pll, frequency adjustment and synchronization section. updated figure 3. 3, 4 6 9, 10 13 14 b 10/11 bga package added. changes refected throughout the data sheet. 1-32 c 02/14 add snpb bga package option 1, 2 ltm4627 4627fc for more information www.linear.com/ltm4627
32 ? linear technology corporation 2010 lt 0214 rev c ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/ltm4627 related parts typical application 3.3v at 10a design comp track/ss run f set mode_pllin pgood v out v out_lcl diff_out v osns + v osns ? v fb ltm4627 v in r1 10k r fb 13.3k r3 174k c2 22f 16v c3 22f 16v c5 47pf c7 0.1f 100f x5r c6 100f x5r 6.3v v out 3.3v 10a c4 c1 22f 16v intv cc extv cc continuous mode 4627 ta02 5v sgnd gnd 82pf part number description comments ltm4628 dual 8a, 26v, dc/dc step-down module regulator 0.6v v out 5v, 4.5v v in 26.5v, remote sense amplifer, internal temperature sensing output, 15mm 15mm 4.32mm lga l tm4611 1.5v in(min) , 15a dc/dc step-down module regulator 0.8v v out 5v, 1.5v v in 5.5v, pll input, remote sense amplifer, v out tracking, 15mm 15mm 4.32mm lga ltm4618 6a dc/dc step-down module regulator 0.8v v out 5v, 4.5v v in 26.5v, pll input, v out tracking, 9mm 15mm 4.32mm lga l tm4613 8a en55022 class b dc/dc step-down module regulator 3.3v v out 15v, 5v v in 36v, pll input, v out tracking and margining, 15mm 15mm 4.32mm lga ltm4601ahv 28v, 12a dc/dc step-down module regulator 0.6v v out 5v, 4.5v v in 28v, pll input, remote sense amplifer, v out tracking and margining, 15mm 15mm 2.82mm lga or 15mm 15mm 3.42mm bga l tm4601a 20v , 12a dc/dc step-down module regulator 0.6v v out 5v, 4.5v v in 20v, pll input, remote sense amplifer, v out tracking and margining, 15mm 15mm 2.82mm lga or 15mm 15mm 3.42mm bga l tm8027 60v , 4a dc/dc step-down module regulator 4.5v v out 60v, 2.5v v in 24v, clk input, 15mm 15mm 4.32mm lga ltc6908-1 50khz to 10mhz dual output oscillator single supply 2.5v v in 5.5v, 90 or 180 phase shift between outputs, optional spread spectrum frequency modulation, 2mm 3mm dfn ltm4627 4627fc for more information www.linear.com/ltm4627

▲Up To Search▲

Price & Availability of LTM4627-15

	To Download LTM4627-15 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .